March 2021 - Cloud Kernel - lists.openanolis.cn

[patch v1] ck: xhci: fix issue with resume from system Sx state

by LeoLiu-oc

On Zhaoxin ZX-100 project, xHCI can't work normally after resume from system Sx state. To fix this issue, when resume from system sx state, reinitialize xHCI instead of restore. The patch is scheduled to be submitted to the kernel mainline in 2021. Signed-off-by: LeoLiu-oc <LeoLiu-oc(a)zhaoxin.com> --- drivers/usb/host/xhci-pci.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c index 712bcb2eab76..2a83b8e50bf5 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c @@ -240,6 +240,9 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) if (pdev->vendor == PCI_VENDOR_ID_TI && pdev->device == 0x8241) xhci->quirks |= XHCI_LIMIT_ENDPOINT_INTERVAL_7; + if (pdev->vendor == PCI_VENDOR_ID_ZHAOXIN && pdev->device == 0x9202) + xhci->quirks |= XHCI_RESET_ON_RESUME; + if ((pdev->vendor == PCI_VENDOR_ID_BROADCOM || pdev->vendor == PCI_VENDOR_ID_CAVIUM) && pdev->device == 0x9026) -- 2.20.1

3 years, 9 months

2
1
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[patch v1 5/6] ck: x86/cpufeatures: Add Zhaoxin feature bits

by LeoLiu-oc

Add Zhaoxin feature bits on Zhaoxin CPUs. The patch is scheduled to be submitted to the kernel mainline in 2021. Signed-off-by: LeoLiu-oc <LeoLiu-oc(a)zhaoxin.com> --- arch/x86/include/asm/cpufeatures.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 301671dda98d..77ecd7136536 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -145,8 +145,12 @@ #define X86_FEATURE_HYPERVISOR ( 4*32+31) /* Running on a hypervisor */ /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ +#define X86_FEATURE_SM2 (5*32+0) /* sm2 present*/ +#define X86_FEATURE_SM2_EN (5*32+1) /* sm2 enabled */ #define X86_FEATURE_XSTORE ( 5*32+ 2) /* "rng" RNG present (xstore) */ #define X86_FEATURE_XSTORE_EN ( 5*32+ 3) /* "rng_en" RNG enabled */ +#define X86_FEATURE_CCS (5*32+4) /* "sm3 sm4" present */ +#define X86_FEATURE_CCS_EN (5*32+5) /* "sm3_en sm4_en" enabled */ #define X86_FEATURE_XCRYPT ( 5*32+ 6) /* "ace" on-CPU crypto (xcrypt) */ #define X86_FEATURE_XCRYPT_EN ( 5*32+ 7) /* "ace_en" on-CPU crypto enabled */ #define X86_FEATURE_ACE2 ( 5*32+ 8) /* Advanced Cryptography Engine v2 */ @@ -155,6 +159,23 @@ #define X86_FEATURE_PHE_EN ( 5*32+11) /* PHE enabled */ #define X86_FEATURE_PMM ( 5*32+12) /* PadLock Montgomery Multiplier */ #define X86_FEATURE_PMM_EN ( 5*32+13) /* PMM enabled */ +#define X86_FEATURE_ZX_FMA (5*32+15) /* FMA supported */ +#define X86_FEATURE_PARALLAX (5*32+16) /* Adaptive P-state control present */ +#define X86_FEATURE_PARALLAX_EN (5*32+17) /* Adaptive P-state control enabled */ +#define X86_FEATURE_OVERSTRESS (5*32+18) /* Overstress Feature for auto overclock present */ +#define X86_FEATURE_OVERSTRESS_EN (5*32+19) /* Overstress Feature for auto overclock enabled */ +#define X86_FEATURE_TM3 (5*32+20) /* Thermal Monitor 3 present */ +#define X86_FEATURE_TM3_EN (5*32+21) /* Thermal Monitor 3 enabled */ +#define X86_FEATURE_RNG2 (5*32+22) /* 2nd generation of RNG present */ +#define X86_FEATURE_RNG2_EN (5*32+23) /* 2nd generation of RNG enabled */ +#define X86_FEATURE_SEM (5*32+24) /* SME feature present */ +#define X86_FEATURE_PHE2 (5*32+25) /* SHA384 and SHA 512 present */ +#define X86_FEATURE_PHE2_EN (5*32+26) /* SHA384 and SHA 512 enabled */ +#define X86_FEATURE_XMODX (5*32+27) /* "rsa" XMODEXP and MONTMUL2 instructions are present */ +#define X86_FEATURE_XMODX_EN (5*32+28) /* "rsa_en" XMODEXP and MONTMUL2instructions are enabled */ +#define X86_FEATURE_VEX (5*32+29) /* VEX instructions are present */ +#define X86_FEATURE_VEX_EN (5*32+30) /* VEX instructions are enabled */ +#define X86_FEATURE_STK (5*32+31) /* STK are present */ /* More extended AMD flags: CPUID level 0x80000001, ECX, word 6 */ #define X86_FEATURE_LAHF_LM ( 6*32+ 0) /* LAHF/SAHF in long mode */ -- 2.20.1

3 years, 9 months

2
1
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[patch v1] ck: xhci: Add Zhaoxin xHCI LPM U1/U2 feature support

by LeoLiu-oc

Add LPM u1/u2 feature support for xHCI of zhaoxin The patch is scheduled to be submitted to the kernel mainline in 2021. Signed-off-by: LeoLiu-oc <LeoLiu-oc(a)zhaoxin.com> --- drivers/usb/host/xhci-pci.c | 4 ++++ drivers/usb/host/xhci.c | 34 ++++++++++++++++++++++++++++++++-- drivers/usb/host/xhci.h | 1 + 3 files changed, 37 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c index 74aeaa61f5c6..712bcb2eab76 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c @@ -216,6 +216,10 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) } if (pdev->vendor == PCI_VENDOR_ID_VIA) xhci->quirks |= XHCI_RESET_ON_RESUME; + if (pdev->vendor == PCI_VENDOR_ID_ZHAOXIN) { + xhci->quirks |= XHCI_LPM_SUPPORT; + xhci->quirks |= XHCI_ZHAOXIN_HOST; + } /* See https://bugzilla.kernel.org/show_bug.cgi?id=79511 */ if (pdev->vendor == PCI_VENDOR_ID_VIA && diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index 6b67b58ef304..77cc520ab337 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c @@ -4553,7 +4553,7 @@ static u16 xhci_calculate_u1_timeout(struct xhci_hcd *xhci, } } - if (xhci->quirks & XHCI_INTEL_HOST) + if (xhci->quirks & (XHCI_INTEL_HOST | XHCI_ZHAOXIN_HOST)) timeout_ns = xhci_calculate_intel_u1_timeout(udev, desc); else timeout_ns = udev->u1_params.sel; @@ -4617,7 +4617,7 @@ static u16 xhci_calculate_u2_timeout(struct xhci_hcd *xhci, } } - if (xhci->quirks & XHCI_INTEL_HOST) + if (xhci->quirks & (XHCI_INTEL_HOST | XHCI_ZHAOXIN_HOST)) timeout_ns = xhci_calculate_intel_u2_timeout(udev, desc); else timeout_ns = udev->u2_params.sel; @@ -4714,12 +4714,42 @@ static int xhci_check_intel_tier_policy(struct usb_device *udev, return -E2BIG; } +static int xhci_check_zhaoxin_tier_policy(struct usb_device *udev, + enum usb3_link_state state) +{ + struct usb_device *parent; + unsigned int num_hubs; + char *state_name; + + if (state == USB3_LPM_U1) + state_name = "U1"; + else if (state == USB3_LPM_U2) + state_name = "U2"; + else + state_name = "Unknown"; + /* Don't enable U1/U2 if the device is on an external hub*/ + for (parent = udev->parent, num_hubs = 0; parent->parent; + parent = parent->parent) + num_hubs++; + + if (num_hubs < 1) + return 0; + + dev_dbg(&udev->dev, "Disabling %s link state for device" \ + " below external hub.\n", state_name); + dev_dbg(&udev->dev, "Plug device into root port " \ + "to decrease power consumption.\n"); + return -E2BIG; +} + static int xhci_check_tier_policy(struct xhci_hcd *xhci, struct usb_device *udev, enum usb3_link_state state) { if (xhci->quirks & XHCI_INTEL_HOST) return xhci_check_intel_tier_policy(udev, state); + else if (xhci->quirks & XHCI_ZHAOXIN_HOST) + return xhci_check_zhaoxin_tier_policy(udev, state); else return 0; } diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index 9b33031cf6fc..76b872dcb0d9 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -1865,6 +1865,7 @@ struct xhci_hcd { #define XHCI_ZERO_64B_REGS BIT_ULL(32) #define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34) #define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35) +#define XHCI_ZHAOXIN_HOST BIT_ULL(36) unsigned int num_active_eps; unsigned int limit_active_eps; -- 2.20.1

3 years, 9 months

2
1
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[PHYTIUM ft2500 v2.0 0/7] support phytium ft2500 platform

by Xin Hao

This patch is provide by vendor phytium to enable ft25000 support Now these patches are only temporarily integrated, and there are a lot of detection warnings, we hope that PHYTIUM engineers can gradually fix these bugs later, follow the uniform format of the kernel, before send a patch, we can use the ./scripts/checkpatch.pl xxx.patch to check that everything is ok, please. Xin Hao (7): PHYTIUM: ACPI: APD: Add clock frequency for for phytium i2c control PHYTIUM: rtc: Add Phytium rtc device support PHYTIUM: ACPI: add support for phytium profiling in GICC PHYTIUM: irqchip:phytium-gic: add phytium new gic control support config:arm64: Enable STAGING default config:arm64: Add PHYTIUM ft2500 chip HW support config: arm64: Change NODES_SHIFT value as 4 arch/arm64/Kconfig.platforms | 6 + configs/config-4.19.y-aarch64 | 51 +- configs/config-4.19.y-aarch64-debug | 51 +- drivers/acpi/acpi_apd.c | 7 + drivers/i2c/busses/i2c-designware-platdrv.c | 1 + drivers/irqchip/irq-gic-common.h | 2 + drivers/rtc/Kconfig | 10 + drivers/rtc/Makefile | 1 + drivers/rtc/rtc-phytium.c | 317 ++ drivers/staging/Kconfig | 2 + drivers/staging/Makefile | 1 + drivers/staging/gic_phytium_2500/Kconfig | 9 + drivers/staging/gic_phytium_2500/Makefile | 1 + .../irq-gic-phytium-2500-its.c | 3863 +++++++++++++++++ .../gic_phytium_2500/irq-gic-phytium-2500.c | 1865 ++++++++ include/acpi/actbl2.h | 3 +- include/linux/irqchip/arm-gic-phytium-2500.h | 619 +++ 17 files changed, 6804 insertions(+), 5 deletions(-) create mode 100644 drivers/rtc/rtc-phytium.c create mode 100644 drivers/staging/gic_phytium_2500/Kconfig create mode 100644 drivers/staging/gic_phytium_2500/Makefile create mode 100644 drivers/staging/gic_phytium_2500/irq-gic-phytium-2500-its.c create mode 100644 drivers/staging/gic_phytium_2500/irq-gic-phytium-2500.c create mode 100644 include/linux/irqchip/arm-gic-phytium-2500.h -- 2.31.0

3 years, 9 months

1
7
0 0

[PATCH openEuler v1 060/119] openEuler: arm64/mpam: support pmg alloc/free

by Xin Hao

From: Xie XiuQi <xiexiuqi(a)huawei.com> commit 89691ba7d9a777361165dd9950370572da562709 openEuler-1.0 hulk inclusion category: feature bugzilla: 5510 CVE: NA Signed-off-by: Xie XiuQi <xiexiuqi(a)huawei.com> Reviewed-by: Hanjun Guo <guohanjun(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> Signed-off-by: Xin Hao <haoxing990(a)gmail.com> --- arch/arm64/include/asm/mpam.h | 1 + arch/arm64/include/asm/mpam_resource.h | 4 +- arch/arm64/include/asm/resctrl.h | 2 + arch/arm64/kernel/mpam.c | 84 +++++++++++++++++++++++++- arch/arm64/kernel/mpam_ctrlmon.c | 2 +- arch/arm64/kernel/mpam_mon.c | 36 ++++++++++- 6 files changed, 123 insertions(+), 6 deletions(-) diff --git a/arch/arm64/include/asm/mpam.h b/arch/arm64/include/asm/mpam.h index 90d50a4db1cb..4f092802982f 100644 --- a/arch/arm64/include/asm/mpam.h +++ b/arch/arm64/include/asm/mpam.h @@ -321,6 +321,7 @@ struct raw_resctrl_resource { int num_partid; u32 default_ctrl; void (*msr_update) (struct rdt_domain *d, int partid); + u64 (*msr_read) (struct rdt_domain *d, int partid); int data_width; const char *format_str; int (*parse_ctrlval) (char *buf, struct raw_resctrl_resource *r, diff --git a/arch/arm64/include/asm/mpam_resource.h b/arch/arm64/include/asm/mpam_resource.h index 4ec2d8605cbc..cd83322b8a43 100644 --- a/arch/arm64/include/asm/mpam_resource.h +++ b/arch/arm64/include/asm/mpam_resource.h @@ -57,8 +57,10 @@ #define BWA_WD 6 /* hard code for P680 */ #define MBW_MAX_MASK 0xFC00 #define MBW_MAX_HARDLIM BIT(31) -#define MBW_MAX_SET(v) (MBW_MAX_HARDLIM|((v) << (15 - BWA_WD))) /* [FIXME] hard code for hardlim */ +/* [FIXME] hard code for hardlim */ +#define MBW_MAX_SET(v) (MBW_MAX_HARDLIM|((v) << (15 - BWA_WD))) +#define MBW_MAX_GET(v) (((v) & MBW_MAX_MASK) >> (15 - BWA_WD)) /* * emulate the mpam nodes * These should be reported by ACPI MPAM Table. diff --git a/arch/arm64/include/asm/resctrl.h b/arch/arm64/include/asm/resctrl.h index b8c983fb68ce..cb02aae8497f 100644 --- a/arch/arm64/include/asm/resctrl.h +++ b/arch/arm64/include/asm/resctrl.h @@ -19,9 +19,11 @@ static inline void free_mon_id(u32 id) free_rmid(id); } +void pmg_init(void); static inline void resctrl_id_init(void) { closid_init(); + pmg_init(); } static inline int resctrl_id_alloc(void) diff --git a/arch/arm64/kernel/mpam.c b/arch/arm64/kernel/mpam.c index 02aa42783ab3..56188953f954 100644 --- a/arch/arm64/kernel/mpam.c +++ b/arch/arm64/kernel/mpam.c @@ -162,21 +162,27 @@ cat_wrmsr(struct rdt_domain *d, int partid); static void bw_wrmsr(struct rdt_domain *d, int partid); +u64 cat_rdmsr(struct rdt_domain *d, int partid); +u64 bw_rdmsr(struct rdt_domain *d, int partid); + #define domain_init(id) LIST_HEAD_INIT(resctrl_resources_all[id].domains) struct raw_resctrl_resource raw_resctrl_resources_all[] = { [MPAM_RESOURCE_SMMU] = { .msr_update = cat_wrmsr, + .msr_read = cat_rdmsr, .parse_ctrlval = parse_cbm, .format_str = "%d=%0*x", }, [MPAM_RESOURCE_CACHE] = { .msr_update = cat_wrmsr, + .msr_read = cat_rdmsr, .parse_ctrlval = parse_cbm, .format_str = "%d=%0*x", }, [MPAM_RESOURCE_MC] = { .msr_update = bw_wrmsr, + .msr_read = bw_rdmsr, .parse_ctrlval = parse_cbm, /* [FIXME] add parse_bw() helper */ .format_str = "%d=%0*x", }, @@ -225,6 +231,22 @@ bw_wrmsr(struct rdt_domain *d, int partid) mpam_writel(val, d->base + MPAMCFG_MBW_MAX); } +u64 cat_rdmsr(struct rdt_domain *d, int partid) +{ + mpam_writel(partid, d->base + MPAMCFG_PART_SEL); + return mpam_readl(d->base + MPAMCFG_CPBM); +} + +u64 bw_rdmsr(struct rdt_domain *d, int partid) +{ + u64 max; + + mpam_writel(partid, d->base + MPAMCFG_PART_SEL); + max = mpam_readl(d->base + MPAMCFG_MBW_MAX); + + return MBW_MAX_GET(max); +} + /* * Trivial allocator for CLOSIDs. Since h/w only supports a small number, * we can keep a bitmap of free CLOSIDs in a single integer. @@ -271,10 +293,11 @@ void closid_free(int closid) static int mpam_online_cpu(unsigned int cpu) { - pr_info("CPU %2d: online cpu and enable mpam\n", cpu); + cpumask_set_cpu(cpu, &resctrl_group_default.cpu_mask); return 0; } +/* [FIXME] remove related resource when cpu offline */ static int mpam_offline_cpu(unsigned int cpu) { pr_info("offline cpu\n"); @@ -540,9 +563,68 @@ static int resctrl_group_cpus_show(struct kernfs_open_file *of, return ret; } +static void cpumask_rdtgrp_clear(struct rdtgroup *r, struct cpumask *m) +{ + struct rdtgroup *crgrp; + + cpumask_andnot(&r->cpu_mask, &r->cpu_mask, m); + /* update the child mon group masks as well*/ + list_for_each_entry(crgrp, &r->mon.crdtgrp_list, mon.crdtgrp_list) + cpumask_and(&crgrp->cpu_mask, &r->cpu_mask, &crgrp->cpu_mask); +} + int cpus_ctrl_write(struct rdtgroup *rdtgrp, cpumask_var_t newmask, cpumask_var_t tmpmask, cpumask_var_t tmpmask1) { + struct rdtgroup *r, *crgrp; + struct list_head *head; + + /* Check whether cpus are dropped from this group */ + cpumask_andnot(tmpmask, &rdtgrp->cpu_mask, newmask); + if (cpumask_weight(tmpmask)) { + /* Can't drop from default group */ + if (rdtgrp == &resctrl_group_default) { + rdt_last_cmd_puts("Can't drop CPUs from default group\n"); + return -EINVAL; + } + + /* Give any dropped cpus to rdtgroup_default */ + cpumask_or(&resctrl_group_default.cpu_mask, + &resctrl_group_default.cpu_mask, tmpmask); + update_closid_rmid(tmpmask, &resctrl_group_default); + } + + /* + * If we added cpus, remove them from previous group and + * the prev group's child groups that owned them + * and update per-cpu closid/rmid. + */ + cpumask_andnot(tmpmask, newmask, &rdtgrp->cpu_mask); + if (cpumask_weight(tmpmask)) { + list_for_each_entry(r, &resctrl_all_groups, resctrl_group_list) { + if (r == rdtgrp) + continue; + cpumask_and(tmpmask1, &r->cpu_mask, tmpmask); + if (cpumask_weight(tmpmask1)) + cpumask_rdtgrp_clear(r, tmpmask1); + } + update_closid_rmid(tmpmask, rdtgrp); + } + + /* Done pushing/pulling - update this group with new mask */ + cpumask_copy(&rdtgrp->cpu_mask, newmask); + + /* + * Clear child mon group masks since there is a new parent mask + * now and update the rmid for the cpus the child lost. + */ + head = &rdtgrp->mon.crdtgrp_list; + list_for_each_entry(crgrp, head, mon.crdtgrp_list) { + cpumask_and(tmpmask, &rdtgrp->cpu_mask, &crgrp->cpu_mask); + update_closid_rmid(tmpmask, rdtgrp); + cpumask_clear(&crgrp->cpu_mask); + } + return 0; } diff --git a/arch/arm64/kernel/mpam_ctrlmon.c b/arch/arm64/kernel/mpam_ctrlmon.c index c8653baf791c..b7af781cdf3d 100644 --- a/arch/arm64/kernel/mpam_ctrlmon.c +++ b/arch/arm64/kernel/mpam_ctrlmon.c @@ -217,7 +217,7 @@ static void show_doms(struct seq_file *s, struct resctrl_resource *r, int partid if (sep) seq_puts(s, ";"); seq_printf(s, rr->format_str, dom->id, max_data_width, - dom->ctrl_val[partid]); + rr->msr_read(dom, partid)); sep = true; } seq_puts(s, "\n"); diff --git a/arch/arm64/kernel/mpam_mon.c b/arch/arm64/kernel/mpam_mon.c index f4eacf14d0b3..ebf8980e072b 100644 --- a/arch/arm64/kernel/mpam_mon.c +++ b/arch/arm64/kernel/mpam_mon.c @@ -35,6 +35,36 @@ */ bool rdt_mon_capable; +static int pmg_free_map; + +void pmg_init(void) +{ + int pmg_max = 16; + + pmg_free_map = BIT_MASK(pmg_max) - 1; + + /* pmg 0 is always reserved for the default group */ + pmg_free_map &= ~1; +} + +int alloc_pmg(void) +{ + u32 pmg = ffs(pmg_free_map); + + if (pmg == 0) + return -ENOSPC; + pmg--; + pmg_free_map &= ~(1 << pmg); + + return pmg; +} + +void free_pmg(u32 pmg) +{ + pmg_free_map |= 1 << pmg; +} + + /* * As of now the RMIDs allocation is global. * However we keep track of which packages the RMIDs @@ -42,10 +72,10 @@ bool rdt_mon_capable; */ int alloc_rmid(void) { - return 0; + return alloc_pmg(); } -void free_rmid(u32 rmid) +void free_rmid(u32 pmg) { + free_pmg(pmg); } - -- 2.31.0

3 years, 9 months

1
59
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[PATCH openEuler v1 000/119] arm64: backport a series of hinic related patches from openEuler-1.0

by Xin Hao

Backport these patches are mainly for cloud kernel to adapt some functions of KunPeng920 machine. 1. Add Huawei hinic network card support 2. Add ARMv8 MPAM (cache QoS and memory bandwidth QoS) support Hongbo Yao (2): openEuler: mpam: Code security rectification openEuler: mpam: fix potential resource leak in mpam_domains_init James Morse (3): openEuler: ACPI / processor: Add helper to convert acpi_id to a phys_cpuid openEuler: ACPI / PPTT: Add helper to validate cache nodes from an offset [dead] openEuler: ACPI / PPTT: Filthy hack to find _a_ backwards reference in the PPTT [ROTTEN] Jason Yan (1): openEuler: cmetrics: remove dead code in mpam_ctrlmon.c and resctrlfs.c Shaozhengchao (15): openeuler: net: hinic: fixes dbgtool bugs openeuler: net/hinic: modify comment openeuler: net/hinic: fix static check problem openeuler: net/hinic: fix the problem that memory leak openeuler: net/hinic: fix return value bug openeuler: net/hinic: fix review comment openeuler: net/hinic: fix tx padding bug openeuler: net/hinic: modify driver version openeuler: net/hinic: fix static check problem openeuler: net/hinic: modify hw_layer comment openeuler: net/hinic: modify nic_layer comment openeuler: net/hinic: remove redundant code openeuler: net/hinic: change the tx min frames to 32 Bytes openeuler: net/hinic: optimize interrupt rush openeuler: net/hinic: rectify issue Tan Xiaojun (2): openEuler: arm64/mpam: define mpam registers openEuler: arm64/mpam: implenment mpam_sched_in() Wang ShaoBo (7): openEuler: mpam : fix missing fill MSMON_CFG_MON_SEL register openEuler: mpam : fix monitor's disorder from openEuler: ACPI / PPTT: cacheinfo: Label caches based on fw_token openEuler: ACPI 6.x: Add definitions for MPAM table openEuler: MPAM / ACPI: Refactoring MPAM init process and set MPAM ACPI as entrance openEuler: arm64/mpam: Fix unreset resources when mkdir ctrl group or umount resctrl openEuler: arm64/mpam: Supplement err tips in info/last_cmd_status Xie XiuQi (56): openEuler: resctrlfs: init support resctrlfs openEuler: arm64/mpam: set MPAM1_EL1/MPAM2_EL2 in mpam_sched_in() openEuler: arm64/mpam: debug: add mpam_{read/write}_sysreg_s for debug on D05 board openEuler: arm64/mpam: use mpam_{read/write}_sysreg_s for debug openEuler: arm64/mpam: add macro helpers for PARTID/PMG openEuler: arm64/mpam: debug: improve debug info openEuler: arm64/mpam: debug: fix debug format openEuler: arm64/mpam: debug: fix debug info print formats openEuler: arm64/mpam: debug: print partid and pmg in tasks show openEuler: arm64/mpam: call mpam_sched_in with context switch openEuler: arm64/mpam: support resctrl_group_schemata_show openEuler: arm64/mpam: support pmg alloc/free openEuler: arm64/mpam: support mondata fields openEuler: arm64/mpam: debug: print more useful info for mon_data openEuler: arm64/mpam: debug: print debug info when create mon_data openEuler: arm64/mpam: add group partid/pmg to tasks show openEuler: arm64/mpam: pass rdtgroup when create mon_data dir openEuler: arm64/mpam: support monitor read openEuler: arm64/mpam: support monitor openEuler: arm64/mpam: support num_partids/num_pmgs openEuler: arm64/mpam: add mpam extension runtime detection openEuler: arm64/mpam: print mpam caps info when booting openEuler: arm64/mpam: disable MPAM_SYS_REG_DEBUG openEuler: arm64/mpam: support monitor openEuler: arm64/mpam: operation not permitted when remove a ctrl group with a mondata openEuler: arm64/mpam: free mon when remove momgroups openEuler: arm64/mpam: mon: add WARN_ON for debug free_pmg openEuler: arm64/mpam: add num_monitors in info dir openEuler: arm64/mpam: get num_mon & num_pmg from hardware openEuler: arm64/mpam: don't reserve mon 0, we can use it as nomarl openEuler: arm64/mpam: get alloc/mon capable/enabled from h/w openEuler: arm64/mpam: alloc/mon capable/enabled debug openEuler: arm64/mpam: add L3TALL & HHALL openEuler: arm64/mpam: enable alloc/mon capable when MPAM enabled openEuler: arm64/mpam: monitor pmg as a property of partid openEuler: arm64/mpam: fix HHA MAX SET/GET operation openEuler: arm64/mpam: don't allowd create mon_groups when out of mon/pmg openEuler: arm64/mpam: use 5% as min memory bandwidth openEuler: arm64/mpam: debug: remove debug pr_info at schemata openEuler: arm64/mpam: support L3TALL, HHALL openEuler: arm64/mpam: hard code mpam resource for Hi1620 2P openEuler: arm64/mpam: delete redundant line in Makefile openEuler: arm64/mpam: add cmdline option: mpam openEuler: arm64/mpam: fix hard code address map for 1620 3P openEuler: arm64/mpam: destroy domain list when failed to init openEuler: arm64/mpam: unmap all previous address when failed openEuler: arm64/mpam: only add new domain node to domain list openEuler: arm64/mpam: remove unsupported resource openEuler: arm64/mpam: update group flags only when enable sucsses openEuler: arm64/mpam: get num_partids from system regs instead of hard code openEuler: arm64/mpam: correct num of partid/pmg openEuler: arm64/mpam: remove unnecessary debug message and dead code openEuler: arm64/mpam: fix a missing unlock in error branch openEuler: arm64/mpam: cleanup debuging code openEuler: arm64/mpam: use snprintf instead of sprintf openEuler: arm64/mpam: cleanup the source file's licence Xin Hao (1): config: arm64: Enable MPAM feature default Xiongfeng Wang (15): openeuler: firmware: arm_sdei: add interrupt binding api openeuler: firmware: arm_sdei: make 'sdei_api_event_disable/enable' public openeuler: lockup_detector: init lockup detector after all the init_calls openeuler: watchdog: add nmi_watchdog support for arm64 based on SDEI openeuler: sdei_watchdog: use the secure arch timer as SDEI watchdog timer openeuler: sdei_watchdog: refresh 'last_timestamp' when enabling nmi_watchdog openeuler: sdei_watchdog: do not disable sdei_watchdog event when failed to initialise SDEI openeuler: sdei_watchdog: clear EOI of the secure timer before kdump openeuler: stop_machine: mask sdei before running the callback openeuler: sdei: fix the wrong SDEI_CLEAR_EOI function number openeuler: arm64: kexec: only clear EOI for SDEI in NMI context openeuler: sdei_watchdog: set secure timer period base on 'watchdog_thresh' openeuler: kprobes/arm64: Blacklist sdei watchdog callback functions openeuler: firmware: arm_sdei: Prohibit probing in '_sdei_handler' openeuler: nmi_watchdog: add asm/nmi.h for ARM64 Xue (15): openeuler: net: hinic: Add Hardware Abstract Layer openeuler: net: hinic: Add NIC Layer openeuler: net: hinic: Add ethtool support openeuler: net: update hi1822 nic driver to 1.8.2.8 openeuler: net: hinic: fix check error in hinic openeuler: net: hinic: delete address print openeuler: net: hinic:fix bug in dbgtool openeuler: net: hinic: cleanup comments openeuler: net: hinic: add security check openeuler: net: hinic: fix bug in api_csr_write openeuler: net: hinic: add card_id protection openeuler: net: update hinic driver to 2.3.2.1 openeuler: net: hinic: fix bug in set vlan openeuler: net: hinic: static check warnings fix openeuler: net: hinic: modify comments Yang Yingliang (2): openEuler: resctrlfs: mpam: init struct for mpam openEuler: arm64/mpam: fix compile warning arch/arm64/Kconfig | 10 + arch/arm64/include/asm/acpi.h | 4 + arch/arm64/include/asm/cpucaps.h | 3 +- arch/arm64/include/asm/mpam.h | 327 ++ arch/arm64/include/asm/mpam_resource.h | 129 + arch/arm64/include/asm/mpam_sched.h | 57 + arch/arm64/include/asm/nmi.h | 5 + arch/arm64/include/asm/resctrl.h | 70 + arch/arm64/include/asm/sysreg.h | 2 + arch/arm64/kernel/Makefile | 2 + arch/arm64/kernel/cpufeature.c | 13 + arch/arm64/kernel/machine_kexec.c | 11 + arch/arm64/kernel/mpam.c | 1499 +++++ arch/arm64/kernel/mpam_ctrlmon.c | 623 ++ arch/arm64/kernel/mpam_mon.c | 124 + arch/arm64/kernel/process.c | 3 + arch/arm64/kernel/watchdog_sdei.c | 137 + configs/config-4.19.y-aarch64 | 2 + configs/config-4.19.y-aarch64-debug | 2 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/mpam.c | 249 + drivers/acpi/pptt.c | 143 + drivers/acpi/processor_core.c | 16 + drivers/firmware/arm_sdei.c | 29 +- drivers/net/ethernet/huawei/Kconfig | 1 + drivers/net/ethernet/huawei/hinic/Kconfig | 5 +- drivers/net/ethernet/huawei/hinic/Makefile | 14 +- .../net/ethernet/huawei/hinic/hinic_api_cmd.c | 1183 ++++ .../net/ethernet/huawei/hinic/hinic_api_cmd.h | 298 + drivers/net/ethernet/huawei/hinic/hinic_cfg.c | 2451 ++++++++ drivers/net/ethernet/huawei/hinic/hinic_cfg.h | 527 ++ .../net/ethernet/huawei/hinic/hinic_cmdq.c | 1560 +++++ .../net/ethernet/huawei/hinic/hinic_cmdq.h | 217 + drivers/net/ethernet/huawei/hinic/hinic_csr.h | 203 + .../net/ethernet/huawei/hinic/hinic_ctx_def.h | 253 + drivers/net/ethernet/huawei/hinic/hinic_dbg.h | 91 + .../ethernet/huawei/hinic/hinic_dbgtool_knl.c | 910 +++ .../ethernet/huawei/hinic/hinic_dbgtool_knl.h | 122 + drivers/net/ethernet/huawei/hinic/hinic_dcb.c | 1805 ++++++ drivers/net/ethernet/huawei/hinic/hinic_dcb.h | 67 + .../net/ethernet/huawei/hinic/hinic_dfx_def.h | 153 + drivers/net/ethernet/huawei/hinic/hinic_eqs.c | 1430 +++++ drivers/net/ethernet/huawei/hinic/hinic_eqs.h | 181 + .../net/ethernet/huawei/hinic/hinic_ethtool.c | 2602 +++++++++ drivers/net/ethernet/huawei/hinic/hinic_hw.h | 732 +++ .../net/ethernet/huawei/hinic/hinic_hw_mgmt.h | 601 +- .../net/ethernet/huawei/hinic/hinic_hwdev.c | 5155 +++++++++++++++++ .../net/ethernet/huawei/hinic/hinic_hwdev.h | 410 ++ .../net/ethernet/huawei/hinic/hinic_hwif.c | 926 +++ .../net/ethernet/huawei/hinic/hinic_hwif.h | 117 + drivers/net/ethernet/huawei/hinic/hinic_lld.c | 2799 +++++++++ drivers/net/ethernet/huawei/hinic/hinic_lld.h | 128 + .../net/ethernet/huawei/hinic/hinic_main.c | 3614 +++++++++--- .../net/ethernet/huawei/hinic/hinic_mbox.c | 1686 ++++++ .../net/ethernet/huawei/hinic/hinic_mbox.h | 232 + .../net/ethernet/huawei/hinic/hinic_mgmt.c | 1452 +++++ .../net/ethernet/huawei/hinic/hinic_mgmt.h | 243 + .../huawei/hinic/hinic_mgmt_interface.h | 962 +++ .../ethernet/huawei/hinic/hinic_msix_attr.c | 130 + .../ethernet/huawei/hinic/hinic_msix_attr.h | 69 + .../huawei/hinic/hinic_multi_host_mgmt.c | 957 +++ .../huawei/hinic/hinic_multi_host_mgmt.h | 107 + drivers/net/ethernet/huawei/hinic/hinic_nic.h | 112 + .../net/ethernet/huawei/hinic/hinic_nic_cfg.c | 3873 +++++++++++++ .../net/ethernet/huawei/hinic/hinic_nic_cfg.h | 626 ++ .../net/ethernet/huawei/hinic/hinic_nic_dbg.c | 289 + .../net/ethernet/huawei/hinic/hinic_nic_dev.h | 299 + .../net/ethernet/huawei/hinic/hinic_nic_io.c | 1022 ++++ .../net/ethernet/huawei/hinic/hinic_nic_io.h | 99 + .../net/ethernet/huawei/hinic/hinic_nictool.c | 2421 ++++++++ .../net/ethernet/huawei/hinic/hinic_nictool.h | 288 + .../ethernet/huawei/hinic/hinic_pci_id_tbl.h | 40 + .../ethernet/huawei/hinic/hinic_port_cmd.h | 545 ++ .../net/ethernet/huawei/hinic/hinic_qe_def.h | 471 ++ drivers/net/ethernet/huawei/hinic/hinic_qp.c | 222 + drivers/net/ethernet/huawei/hinic/hinic_qp.h | 152 + drivers/net/ethernet/huawei/hinic/hinic_rx.c | 1406 +++-- drivers/net/ethernet/huawei/hinic/hinic_rx.h | 121 +- .../net/ethernet/huawei/hinic/hinic_sm_lt.h | 228 + .../ethernet/huawei/hinic/hinic_sml_counter.c | 308 + .../ethernet/huawei/hinic/hinic_sml_counter.h | 118 + .../net/ethernet/huawei/hinic/hinic_sml_lt.c | 238 + .../ethernet/huawei/hinic/hinic_sml_table.h | 2728 +++++++++ .../huawei/hinic/hinic_sml_table_pub.h | 277 + .../net/ethernet/huawei/hinic/hinic_sriov.c | 502 ++ .../net/ethernet/huawei/hinic/hinic_sriov.h | 71 + drivers/net/ethernet/huawei/hinic/hinic_tx.c | 1470 +++-- drivers/net/ethernet/huawei/hinic/hinic_tx.h | 118 +- drivers/net/ethernet/huawei/hinic/hinic_wq.c | 687 +++ drivers/net/ethernet/huawei/hinic/hinic_wq.h | 117 + drivers/net/ethernet/huawei/hinic/ossl_knl.h | 55 + .../ethernet/huawei/hinic/ossl_knl_linux.c | 138 + .../ethernet/huawei/hinic/ossl_knl_linux.h | 491 ++ .../net/ethernet/huawei/hinic/ossl_types.h | 41 + fs/Kconfig | 9 + fs/Makefile | 1 + fs/resctrlfs.c | 970 ++++ include/acpi/actbl2.h | 58 + include/acpi/processor.h | 1 + include/linux/acpi.h | 8 + include/linux/arm_sdei.h | 5 + include/linux/nmi.h | 8 + include/linux/resctrlfs.h | 97 + include/linux/sched.h | 2 +- include/uapi/linux/arm_sdei.h | 2 + init/main.c | 3 +- kernel/stop_machine.c | 10 + kernel/watchdog.c | 2 + kernel/watchdog_hld.c | 10 + lib/Kconfig.debug | 5 + 111 files changed, 57014 insertions(+), 1607 deletions(-) create mode 100644 arch/arm64/include/asm/mpam.h create mode 100644 arch/arm64/include/asm/mpam_resource.h create mode 100644 arch/arm64/include/asm/mpam_sched.h create mode 100644 arch/arm64/include/asm/nmi.h create mode 100644 arch/arm64/include/asm/resctrl.h create mode 100644 arch/arm64/kernel/mpam.c create mode 100644 arch/arm64/kernel/mpam_ctrlmon.c create mode 100644 arch/arm64/kernel/mpam_mon.c create mode 100644 arch/arm64/kernel/watchdog_sdei.c create mode 100644 drivers/acpi/arm64/mpam.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_api_cmd.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_api_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_cfg.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_cfg.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_cmdq.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_cmdq.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_csr.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_ctx_def.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_dbg.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_dbgtool_knl.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_dbgtool_knl.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_dcb.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_dcb.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_dfx_def.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_eqs.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_eqs.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_ethtool.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_hw.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_hwdev.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_hwdev.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_hwif.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_hwif.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_lld.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_lld.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_mbox.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_mbox.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_mgmt.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_mgmt.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_mgmt_interface.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_msix_attr.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_msix_attr.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_multi_host_mgmt.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_multi_host_mgmt.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nic.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nic_cfg.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nic_cfg.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nic_dbg.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nic_dev.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nic_io.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nic_io.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nictool.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nictool.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_pci_id_tbl.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_port_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_qe_def.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_qp.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_qp.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sm_lt.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sml_counter.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sml_counter.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sml_lt.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sml_table.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sml_table_pub.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sriov.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sriov.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_wq.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_wq.h create mode 100644 drivers/net/ethernet/huawei/hinic/ossl_knl.h create mode 100644 drivers/net/ethernet/huawei/hinic/ossl_knl_linux.c create mode 100644 drivers/net/ethernet/huawei/hinic/ossl_knl_linux.h create mode 100644 drivers/net/ethernet/huawei/hinic/ossl_types.h create mode 100644 fs/resctrlfs.c create mode 100644 include/linux/resctrlfs.h -- 2.31.0

3 years, 9 months

1
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[PATCH openEuler v1 000/119] arm64: backport a series of hinic related patches from openEuler-1.0

by Xin HAao

From: Xin Hao <haoxing990(a)gmail.com> Backport these patches are mainly for cloud kernel to adapt some functions of KunPeng920 machine. 1. Add Huawei hinic network card support 2. Add ARMv8 MPAM (cache QoS and memory bandwidth QoS) support Hongbo Yao (2): openEuler: mpam: Code security rectification openEuler: mpam: fix potential resource leak in mpam_domains_init James Morse (3): openEuler: ACPI / processor: Add helper to convert acpi_id to a phys_cpuid openEuler: ACPI / PPTT: Add helper to validate cache nodes from an offset [dead] openEuler: ACPI / PPTT: Filthy hack to find _a_ backwards reference in the PPTT [ROTTEN] Jason Yan (1): openEuler: cmetrics: remove dead code in mpam_ctrlmon.c and resctrlfs.c Shaozhengchao (15): openeuler: net: hinic: fixes dbgtool bugs openeuler: net/hinic: modify comment openeuler: net/hinic: fix static check problem openeuler: net/hinic: fix the problem that memory leak openeuler: net/hinic: fix return value bug openeuler: net/hinic: fix review comment openeuler: net/hinic: fix tx padding bug openeuler: net/hinic: modify driver version openeuler: net/hinic: fix static check problem openeuler: net/hinic: modify hw_layer comment openeuler: net/hinic: modify nic_layer comment openeuler: net/hinic: remove redundant code openeuler: net/hinic: change the tx min frames to 32 Bytes openeuler: net/hinic: optimize interrupt rush openeuler: net/hinic: rectify issue Tan Xiaojun (2): openEuler: arm64/mpam: define mpam registers openEuler: arm64/mpam: implenment mpam_sched_in() Wang ShaoBo (7): openEuler: mpam : fix missing fill MSMON_CFG_MON_SEL register openEuler: mpam : fix monitor's disorder from openEuler: ACPI / PPTT: cacheinfo: Label caches based on fw_token openEuler: ACPI 6.x: Add definitions for MPAM table openEuler: MPAM / ACPI: Refactoring MPAM init process and set MPAM ACPI as entrance openEuler: arm64/mpam: Fix unreset resources when mkdir ctrl group or umount resctrl openEuler: arm64/mpam: Supplement err tips in info/last_cmd_status Xie XiuQi (56): openEuler: resctrlfs: init support resctrlfs openEuler: arm64/mpam: set MPAM1_EL1/MPAM2_EL2 in mpam_sched_in() openEuler: arm64/mpam: debug: add mpam_{read/write}_sysreg_s for debug on D05 board openEuler: arm64/mpam: use mpam_{read/write}_sysreg_s for debug openEuler: arm64/mpam: add macro helpers for PARTID/PMG openEuler: arm64/mpam: debug: improve debug info openEuler: arm64/mpam: debug: fix debug format openEuler: arm64/mpam: debug: fix debug info print formats openEuler: arm64/mpam: debug: print partid and pmg in tasks show openEuler: arm64/mpam: call mpam_sched_in with context switch openEuler: arm64/mpam: support resctrl_group_schemata_show openEuler: arm64/mpam: support pmg alloc/free openEuler: arm64/mpam: support mondata fields openEuler: arm64/mpam: debug: print more useful info for mon_data openEuler: arm64/mpam: debug: print debug info when create mon_data openEuler: arm64/mpam: add group partid/pmg to tasks show openEuler: arm64/mpam: pass rdtgroup when create mon_data dir openEuler: arm64/mpam: support monitor read openEuler: arm64/mpam: support monitor openEuler: arm64/mpam: support num_partids/num_pmgs openEuler: arm64/mpam: add mpam extension runtime detection openEuler: arm64/mpam: print mpam caps info when booting openEuler: arm64/mpam: disable MPAM_SYS_REG_DEBUG openEuler: arm64/mpam: support monitor openEuler: arm64/mpam: operation not permitted when remove a ctrl group with a mondata openEuler: arm64/mpam: free mon when remove momgroups openEuler: arm64/mpam: mon: add WARN_ON for debug free_pmg openEuler: arm64/mpam: add num_monitors in info dir openEuler: arm64/mpam: get num_mon & num_pmg from hardware openEuler: arm64/mpam: don't reserve mon 0, we can use it as nomarl openEuler: arm64/mpam: get alloc/mon capable/enabled from h/w openEuler: arm64/mpam: alloc/mon capable/enabled debug openEuler: arm64/mpam: add L3TALL & HHALL openEuler: arm64/mpam: enable alloc/mon capable when MPAM enabled openEuler: arm64/mpam: monitor pmg as a property of partid openEuler: arm64/mpam: fix HHA MAX SET/GET operation openEuler: arm64/mpam: don't allowd create mon_groups when out of mon/pmg openEuler: arm64/mpam: use 5% as min memory bandwidth openEuler: arm64/mpam: debug: remove debug pr_info at schemata openEuler: arm64/mpam: support L3TALL, HHALL openEuler: arm64/mpam: hard code mpam resource for Hi1620 2P openEuler: arm64/mpam: delete redundant line in Makefile openEuler: arm64/mpam: add cmdline option: mpam openEuler: arm64/mpam: fix hard code address map for 1620 3P openEuler: arm64/mpam: destroy domain list when failed to init openEuler: arm64/mpam: unmap all previous address when failed openEuler: arm64/mpam: only add new domain node to domain list openEuler: arm64/mpam: remove unsupported resource openEuler: arm64/mpam: update group flags only when enable sucsses openEuler: arm64/mpam: get num_partids from system regs instead of hard code openEuler: arm64/mpam: correct num of partid/pmg openEuler: arm64/mpam: remove unnecessary debug message and dead code openEuler: arm64/mpam: fix a missing unlock in error branch openEuler: arm64/mpam: cleanup debuging code openEuler: arm64/mpam: use snprintf instead of sprintf openEuler: arm64/mpam: cleanup the source file's licence Xin Hao (1): config: arm64: Enable MPAM feature default Xiongfeng Wang (15): openeuler: firmware: arm_sdei: add interrupt binding api openeuler: firmware: arm_sdei: make 'sdei_api_event_disable/enable' public openeuler: lockup_detector: init lockup detector after all the init_calls openeuler: watchdog: add nmi_watchdog support for arm64 based on SDEI openeuler: sdei_watchdog: use the secure arch timer as SDEI watchdog timer openeuler: sdei_watchdog: refresh 'last_timestamp' when enabling nmi_watchdog openeuler: sdei_watchdog: do not disable sdei_watchdog event when failed to initialise SDEI openeuler: sdei_watchdog: clear EOI of the secure timer before kdump openeuler: stop_machine: mask sdei before running the callback openeuler: sdei: fix the wrong SDEI_CLEAR_EOI function number openeuler: arm64: kexec: only clear EOI for SDEI in NMI context openeuler: sdei_watchdog: set secure timer period base on 'watchdog_thresh' openeuler: kprobes/arm64: Blacklist sdei watchdog callback functions openeuler: firmware: arm_sdei: Prohibit probing in '_sdei_handler' openeuler: nmi_watchdog: add asm/nmi.h for ARM64 Xue (15): openeuler: net: hinic: Add Hardware Abstract Layer openeuler: net: hinic: Add NIC Layer openeuler: net: hinic: Add ethtool support openeuler: net: update hi1822 nic driver to 1.8.2.8 openeuler: net: hinic: fix check error in hinic openeuler: net: hinic: delete address print openeuler: net: hinic:fix bug in dbgtool openeuler: net: hinic: cleanup comments openeuler: net: hinic: add security check openeuler: net: hinic: fix bug in api_csr_write openeuler: net: hinic: add card_id protection openeuler: net: update hinic driver to 2.3.2.1 openeuler: net: hinic: fix bug in set vlan openeuler: net: hinic: static check warnings fix openeuler: net: hinic: modify comments Yang Yingliang (2): openEuler: resctrlfs: mpam: init struct for mpam openEuler: arm64/mpam: fix compile warning arch/arm64/Kconfig | 10 + arch/arm64/include/asm/acpi.h | 4 + arch/arm64/include/asm/cpucaps.h | 3 +- arch/arm64/include/asm/mpam.h | 327 ++ arch/arm64/include/asm/mpam_resource.h | 129 + arch/arm64/include/asm/mpam_sched.h | 57 + arch/arm64/include/asm/nmi.h | 5 + arch/arm64/include/asm/resctrl.h | 70 + arch/arm64/include/asm/sysreg.h | 2 + arch/arm64/kernel/Makefile | 2 + arch/arm64/kernel/cpufeature.c | 13 + arch/arm64/kernel/machine_kexec.c | 11 + arch/arm64/kernel/mpam.c | 1499 +++++ arch/arm64/kernel/mpam_ctrlmon.c | 623 ++ arch/arm64/kernel/mpam_mon.c | 124 + arch/arm64/kernel/process.c | 3 + arch/arm64/kernel/watchdog_sdei.c | 137 + configs/config-4.19.y-aarch64 | 2 + configs/config-4.19.y-aarch64-debug | 2 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/mpam.c | 249 + drivers/acpi/pptt.c | 143 + drivers/acpi/processor_core.c | 16 + drivers/firmware/arm_sdei.c | 29 +- drivers/net/ethernet/huawei/Kconfig | 1 + drivers/net/ethernet/huawei/hinic/Kconfig | 5 +- drivers/net/ethernet/huawei/hinic/Makefile | 14 +- .../net/ethernet/huawei/hinic/hinic_api_cmd.c | 1183 ++++ .../net/ethernet/huawei/hinic/hinic_api_cmd.h | 298 + drivers/net/ethernet/huawei/hinic/hinic_cfg.c | 2451 ++++++++ drivers/net/ethernet/huawei/hinic/hinic_cfg.h | 527 ++ .../net/ethernet/huawei/hinic/hinic_cmdq.c | 1560 +++++ .../net/ethernet/huawei/hinic/hinic_cmdq.h | 217 + drivers/net/ethernet/huawei/hinic/hinic_csr.h | 203 + .../net/ethernet/huawei/hinic/hinic_ctx_def.h | 253 + drivers/net/ethernet/huawei/hinic/hinic_dbg.h | 91 + .../ethernet/huawei/hinic/hinic_dbgtool_knl.c | 910 +++ .../ethernet/huawei/hinic/hinic_dbgtool_knl.h | 122 + drivers/net/ethernet/huawei/hinic/hinic_dcb.c | 1805 ++++++ drivers/net/ethernet/huawei/hinic/hinic_dcb.h | 67 + .../net/ethernet/huawei/hinic/hinic_dfx_def.h | 153 + drivers/net/ethernet/huawei/hinic/hinic_eqs.c | 1430 +++++ drivers/net/ethernet/huawei/hinic/hinic_eqs.h | 181 + .../net/ethernet/huawei/hinic/hinic_ethtool.c | 2602 +++++++++ drivers/net/ethernet/huawei/hinic/hinic_hw.h | 732 +++ .../net/ethernet/huawei/hinic/hinic_hw_mgmt.h | 601 +- .../net/ethernet/huawei/hinic/hinic_hwdev.c | 5155 +++++++++++++++++ .../net/ethernet/huawei/hinic/hinic_hwdev.h | 410 ++ .../net/ethernet/huawei/hinic/hinic_hwif.c | 926 +++ .../net/ethernet/huawei/hinic/hinic_hwif.h | 117 + drivers/net/ethernet/huawei/hinic/hinic_lld.c | 2799 +++++++++ drivers/net/ethernet/huawei/hinic/hinic_lld.h | 128 + .../net/ethernet/huawei/hinic/hinic_main.c | 3614 +++++++++--- .../net/ethernet/huawei/hinic/hinic_mbox.c | 1686 ++++++ .../net/ethernet/huawei/hinic/hinic_mbox.h | 232 + .../net/ethernet/huawei/hinic/hinic_mgmt.c | 1452 +++++ .../net/ethernet/huawei/hinic/hinic_mgmt.h | 243 + .../huawei/hinic/hinic_mgmt_interface.h | 962 +++ .../ethernet/huawei/hinic/hinic_msix_attr.c | 130 + .../ethernet/huawei/hinic/hinic_msix_attr.h | 69 + .../huawei/hinic/hinic_multi_host_mgmt.c | 957 +++ .../huawei/hinic/hinic_multi_host_mgmt.h | 107 + drivers/net/ethernet/huawei/hinic/hinic_nic.h | 112 + .../net/ethernet/huawei/hinic/hinic_nic_cfg.c | 3873 +++++++++++++ .../net/ethernet/huawei/hinic/hinic_nic_cfg.h | 626 ++ .../net/ethernet/huawei/hinic/hinic_nic_dbg.c | 289 + .../net/ethernet/huawei/hinic/hinic_nic_dev.h | 299 + .../net/ethernet/huawei/hinic/hinic_nic_io.c | 1022 ++++ .../net/ethernet/huawei/hinic/hinic_nic_io.h | 99 + .../net/ethernet/huawei/hinic/hinic_nictool.c | 2421 ++++++++ .../net/ethernet/huawei/hinic/hinic_nictool.h | 288 + .../ethernet/huawei/hinic/hinic_pci_id_tbl.h | 40 + .../ethernet/huawei/hinic/hinic_port_cmd.h | 545 ++ .../net/ethernet/huawei/hinic/hinic_qe_def.h | 471 ++ drivers/net/ethernet/huawei/hinic/hinic_qp.c | 222 + drivers/net/ethernet/huawei/hinic/hinic_qp.h | 152 + drivers/net/ethernet/huawei/hinic/hinic_rx.c | 1406 +++-- drivers/net/ethernet/huawei/hinic/hinic_rx.h | 121 +- .../net/ethernet/huawei/hinic/hinic_sm_lt.h | 228 + .../ethernet/huawei/hinic/hinic_sml_counter.c | 308 + .../ethernet/huawei/hinic/hinic_sml_counter.h | 118 + .../net/ethernet/huawei/hinic/hinic_sml_lt.c | 238 + .../ethernet/huawei/hinic/hinic_sml_table.h | 2728 +++++++++ .../huawei/hinic/hinic_sml_table_pub.h | 277 + .../net/ethernet/huawei/hinic/hinic_sriov.c | 502 ++ .../net/ethernet/huawei/hinic/hinic_sriov.h | 71 + drivers/net/ethernet/huawei/hinic/hinic_tx.c | 1470 +++-- drivers/net/ethernet/huawei/hinic/hinic_tx.h | 118 +- drivers/net/ethernet/huawei/hinic/hinic_wq.c | 687 +++ drivers/net/ethernet/huawei/hinic/hinic_wq.h | 117 + drivers/net/ethernet/huawei/hinic/ossl_knl.h | 55 + .../ethernet/huawei/hinic/ossl_knl_linux.c | 138 + .../ethernet/huawei/hinic/ossl_knl_linux.h | 491 ++ .../net/ethernet/huawei/hinic/ossl_types.h | 41 + fs/Kconfig | 9 + fs/Makefile | 1 + fs/resctrlfs.c | 970 ++++ include/acpi/actbl2.h | 58 + include/acpi/processor.h | 1 + include/linux/acpi.h | 8 + include/linux/arm_sdei.h | 5 + include/linux/nmi.h | 8 + include/linux/resctrlfs.h | 97 + include/linux/sched.h | 2 +- include/uapi/linux/arm_sdei.h | 2 + init/main.c | 3 +- kernel/stop_machine.c | 10 + kernel/watchdog.c | 2 + kernel/watchdog_hld.c | 10 + lib/Kconfig.debug | 5 + 111 files changed, 57014 insertions(+), 1607 deletions(-) create mode 100644 arch/arm64/include/asm/mpam.h create mode 100644 arch/arm64/include/asm/mpam_resource.h create mode 100644 arch/arm64/include/asm/mpam_sched.h create mode 100644 arch/arm64/include/asm/nmi.h create mode 100644 arch/arm64/include/asm/resctrl.h create mode 100644 arch/arm64/kernel/mpam.c create mode 100644 arch/arm64/kernel/mpam_ctrlmon.c create mode 100644 arch/arm64/kernel/mpam_mon.c create mode 100644 arch/arm64/kernel/watchdog_sdei.c create mode 100644 drivers/acpi/arm64/mpam.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_api_cmd.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_api_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_cfg.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_cfg.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_cmdq.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_cmdq.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_csr.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_ctx_def.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_dbg.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_dbgtool_knl.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_dbgtool_knl.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_dcb.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_dcb.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_dfx_def.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_eqs.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_eqs.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_ethtool.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_hw.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_hwdev.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_hwdev.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_hwif.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_hwif.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_lld.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_lld.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_mbox.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_mbox.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_mgmt.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_mgmt.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_mgmt_interface.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_msix_attr.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_msix_attr.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_multi_host_mgmt.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_multi_host_mgmt.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nic.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nic_cfg.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nic_cfg.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nic_dbg.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nic_dev.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nic_io.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nic_io.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nictool.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_nictool.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_pci_id_tbl.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_port_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_qe_def.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_qp.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_qp.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sm_lt.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sml_counter.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sml_counter.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sml_lt.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sml_table.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sml_table_pub.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sriov.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_sriov.h create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_wq.c create mode 100644 drivers/net/ethernet/huawei/hinic/hinic_wq.h create mode 100644 drivers/net/ethernet/huawei/hinic/ossl_knl.h create mode 100644 drivers/net/ethernet/huawei/hinic/ossl_knl_linux.c create mode 100644 drivers/net/ethernet/huawei/hinic/ossl_knl_linux.h create mode 100644 drivers/net/ethernet/huawei/hinic/ossl_types.h create mode 100644 fs/resctrlfs.c create mode 100644 include/linux/resctrlfs.h -- 2.31.0

3 years, 9 months

1
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[patch v1] x86/apic: Mask IOAPIC entries when disabling the local APIC

by LeoLiu-oc

commit 0f378d73d429d5f73fe2f00be4c9a15dbe9779ee upstream. When a system suspends, the local APIC is disabled in the suspend sequence, but the IOAPIC is left in the current state. This means unmasked interrupt lines stay unmasked. This is usually the case for IOAPIC pin 9 to which the ACPI interrupt is connected. That means that in suspended state the IOAPIC can respond to an external interrupt, e.g. the wakeup via keyboard/RTC/ACPI, but the interrupt message cannot be handled by the disabled local APIC. As a consequence the Remote IRR bit is set, but the local APIC does not send an EOI to acknowledge it. This causes the affected interrupt line to become stale and the stale Remote IRR bit will cause a hang when __synchronize_hardirq() is invoked for that interrupt line. To prevent this, mask all IOAPIC entries before disabling the local APIC. The resume code already has the unmask operation inside. [ tglx: Massaged changelog ] Signed-off-by: Tony W Wang-oc <TonyWWang-oc(a)zhaoxin.com> Signed-off-by: Thomas Gleixner <tglx(a)linutronix.de> Link: https://lore.kernel.org/r/1579076539-7267-1-git-send-email-TonyWWang-oc@zha… Signed-off-by: LeoLiu-oc <LeoLiu-oc(a)zhaoxin.com> --- arch/x86/kernel/apic/apic.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index fe19098fc35d..236399ad53df 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -2577,6 +2577,13 @@ static int lapic_suspend(void) #endif local_irq_save(flags); + + /* + * Mask IOAPIC before disabling the local APIC to prevent stale IRR + * entries on some implementations. + */ + mask_ioapic_entries(); + disable_local_APIC(); irq_remapping_disable(); -- 2.20.1

3 years, 9 months

1
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[patch v1] ck: xhci: fix issue of cross page boundary in TRB prefetch mechanism

by LeoLiu-oc

On some Zhaoxin platforms, xHCI will prefetch TRB for performance improvement. However this TRB prefetch mechanism may cross page boundary, which may access memory not belong to xHCI. In order to fix this issue, using two pages for TRB allocate and only the first page will be used. The patch is scheduled to be submitted to the kernel mainline in 2021. Signed-off-by: LeoLiu-oc <LeoLiu-oc(a)zhaoxin.com> --- drivers/usb/host/xhci-mem.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index 82ce6d8b708d..9f4e1ee82898 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c @@ -2364,6 +2364,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) { dma_addr_t dma; struct device *dev = xhci_to_hcd(xhci)->self.sysdev; + struct pci_dev *pdev = to_pci_dev(dev); unsigned int val, val2; u64 val_64; u32 page_size, temp; @@ -2429,8 +2430,13 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) * and our use of dma addresses in the trb_address_map radix tree needs * TRB_SEGMENT_SIZE alignment, so we pick the greater alignment need. */ - xhci->segment_pool = dma_pool_create("xHCI ring segments", dev, - TRB_SEGMENT_SIZE, TRB_SEGMENT_SIZE, xhci->page_size); + /*With xHCI TRB prefetch patch:To fix cross page boundry access issue in IOV environment*/ + if ((pdev->vendor == PCI_VENDOR_ID_ZHAOXIN) && (pdev->device == 0x9202 || pdev->device == 0x9203)) { + xhci->segment_pool = dma_pool_create("xHCI ring segments", dev, + TRB_SEGMENT_SIZE*2, TRB_SEGMENT_SIZE*2, xhci->page_size*2); + } else + xhci->segment_pool = dma_pool_create("xHCI ring segments", dev, + TRB_SEGMENT_SIZE, TRB_SEGMENT_SIZE, xhci->page_size); /* See Table 46 and Note on Figure 55 */ xhci->device_pool = dma_pool_create("xHCI input/output contexts", dev, -- 2.20.1

3 years, 9 months

1
0
0 0

[patch v1 3/3] PCI: Add ACS quirk for Zhaoxin Root/Downstream Ports

by LeoLiu-oc

commit 299bd044a6f332b4a6c8f708575c27cad70a35c1 upstream. Many Zhaoxin Root Ports and Switch Downstream Ports do provide ACS-like capability but have no ACS Capability Structure. Peer-to-Peer transactions could be blocked between these ports, so add quirk so devices behind them could be assigned to different IOMMU group. Link: https://lore.kernel.org/r/20200327091148.5190-4-RaymondPang-oc@zhaoxin.com Signed-off-by: Raymond Pang <RaymondPang-oc(a)zhaoxin.com> Signed-off-by: Bjorn Helgaas <bhelgaas(a)google.com> [ LeoLiu-oc: Adapt to current kernel code ] Signed-off-by: LeoLiu-oc <LeoLiu-oc(a)zhaoxin.com> --- drivers/pci/quirks.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 9c82ba1b2156..943b006c15b9 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -4265,6 +4265,31 @@ static int pci_quirk_xgene_acs(struct pci_dev *dev, u16 acs_flags) return acs_flags ? 0 : 1; } + /* + * Many Zhaoxin Root Ports and Switch Downstream Ports have no ACS capability. + * But the implementation could block peer-to-peer transactions between them + * and provide ACS-like functionality. + */ +static int pci_quirk_zhaoxin_pcie_ports_acs(struct pci_dev *dev, u16 acs_flags) +{ + u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV); + int ret = acs_flags & ~flags ? 0 : 1; + + if (!pci_is_pcie(dev) || + ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) && + (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM))) + return -ENOTTY; + + switch (dev->device) { + case 0x0710 ... 0x071e: + case 0x0721: + case 0x0723 ... 0x0732: + return ret; + } + + return false; +} + /* * Many Intel PCH root ports do provide ACS-like features to disable peer * transactions and validate bus numbers in requests, but do not provide an @@ -4542,6 +4567,8 @@ static const struct pci_dev_acs_enabled { { PCI_VENDOR_ID_ZHAOXIN, 0x3038, pci_quirk_mf_endpoint_acs }, { PCI_VENDOR_ID_ZHAOXIN, 0x3104, pci_quirk_mf_endpoint_acs }, { PCI_VENDOR_ID_ZHAOXIN, 0x9083, pci_quirk_mf_endpoint_acs }, + /* Zhaoxin Root/Downstream Ports */ + { PCI_VENDOR_ID_ZHAOXIN, PCI_ANY_ID, pci_quirk_zhaoxin_pcie_ports_acs }, { 0 } }; -- 2.20.1

3 years, 9 months

1
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2024

2023

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2021

Cloud Kernel March 2021