commit 0f378d73d429d5f73fe2f00be4c9a15dbe9779ee upstream.
When a system suspends, the local APIC is disabled in the suspend sequence,
but the IOAPIC is left in the current state. This means unmasked interrupt
lines stay unmasked. This is usually the case for IOAPIC pin 9 to which the
ACPI interrupt is connected.
That means that in suspended state the IOAPIC can respond to an external
interrupt, e.g. the wakeup via keyboard/RTC/ACPI, but the interrupt message
cannot be handled by the disabled local APIC. As a consequence the Remote
IRR bit is set, but the local APIC does not send an EOI to acknowledge
it. This causes the affected interrupt line to become stale and the stale
Remote IRR bit will cause a hang when __synchronize_hardirq() is invoked
for that interrupt line.
To prevent this, mask all IOAPIC entries before disabling the local
APIC. The resume code already has the unmask operation inside.
[ tglx: Massaged changelog ]
Signed-off-by: Tony W Wang-oc <TonyWWang-oc(a)zhaoxin.com>
Signed-off-by: Thomas Gleixner <tglx(a)linutronix.de>
Link:
https://lore.kernel.org/r/1579076539-7267-1-git-send-email-TonyWWang-oc@zha…
Signed-off-by: LeoLiu-oc <LeoLiu-oc(a)zhaoxin.com>
---
arch/x86/kernel/apic/apic.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index fe19098fc35d..236399ad53df 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -2577,6 +2577,13 @@ static int lapic_suspend(void)
#endif
local_irq_save(flags);
+
+ /*
+ * Mask IOAPIC before disabling the local APIC to prevent stale IRR
+ * entries on some implementations.
+ */
+ mask_ioapic_entries();
+
disable_local_APIC();
irq_remapping_disable();
--
2.20.1
On some Zhaoxin platforms, xHCI will prefetch TRB for performance
improvement. However this TRB prefetch mechanism may cross page boundary,
which may access memory not belong to xHCI. In order to fix this issue,
using two pages for TRB allocate and only the first page will be used.
The patch is scheduled to be submitted to the kernel mainline in 2021.
Signed-off-by: LeoLiu-oc <LeoLiu-oc(a)zhaoxin.com>
---
drivers/usb/host/xhci-mem.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 82ce6d8b708d..9f4e1ee82898 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -2364,6 +2364,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
{
dma_addr_t dma;
struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
+ struct pci_dev *pdev = to_pci_dev(dev);
unsigned int val, val2;
u64 val_64;
u32 page_size, temp;
@@ -2429,8 +2430,13 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
* and our use of dma addresses in the trb_address_map radix tree needs
* TRB_SEGMENT_SIZE alignment, so we pick the greater alignment need.
*/
- xhci->segment_pool = dma_pool_create("xHCI ring segments", dev,
- TRB_SEGMENT_SIZE, TRB_SEGMENT_SIZE, xhci->page_size);
+ /*With xHCI TRB prefetch patch:To fix cross page boundry access issue
in IOV environment*/
+ if ((pdev->vendor == PCI_VENDOR_ID_ZHAOXIN) && (pdev->device == 0x9202
|| pdev->device == 0x9203)) {
+ xhci->segment_pool = dma_pool_create("xHCI ring segments", dev,
+ TRB_SEGMENT_SIZE*2, TRB_SEGMENT_SIZE*2, xhci->page_size*2);
+ } else
+ xhci->segment_pool = dma_pool_create("xHCI ring segments", dev,
+ TRB_SEGMENT_SIZE, TRB_SEGMENT_SIZE, xhci->page_size);
/* See Table 46 and Note on Figure 55 */
xhci->device_pool = dma_pool_create("xHCI input/output contexts", dev,
--
2.20.1
Lots of Zhaoxin PCIe components have no ACS Capability Structure, but do
have ACS-like capability which ensures DMA isolation.
This patch makes isolated devices could be directly assigned to
different VMs through IOMMU.
LeoLiu-oc (3):
PCI: Add Zhaoxin Vendor ID
PCI: Add ACS quirk for Zhaoxin multi-function devices
PCI: Add ACS quirk for Zhaoxin Root/Downstream Ports
drivers/pci/quirks.c | 31 +++++++++++++++++++++++++++++++
include/linux/pci_ids.h | 2 ++
2 files changed, 33 insertions(+)
--
2.20.1
Zhaoxin have new SB & NB HDAC controller. And have new NB HDAC codec.
This patch set add support for them.
LeoLiu-oc (3):
ck: ALSA: hda: Add support of Zhaoxin SB HDAC
ck: ALSA: hda: Add support of Zhaoxin NB HDAC
ck: ALSA: hda: Add support of Zhaoxin NB HDAC codec
sound/pci/hda/hda_controller.c | 17 ++++++++-
sound/pci/hda/hda_controller.h | 2 +
sound/pci/hda/hda_intel.c | 68 +++++++++++++++++++++++++++++++++-
sound/pci/hda/patch_hdmi.c | 26 +++++++++++++
4 files changed, 111 insertions(+), 2 deletions(-)
--
2.20.1